Maithreyi Venkatesan
SoC Design Verification Intern at Intel | Electrical and Computer Engineering at PSU
- Role
- Soc Design Verification Intern at Intel
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
Experience
Soc Design Verification Intern
Jan 2026 — Present · Santa Clara, CA, US
Education
Rosily Matriculation Higher Secondary School
12th
2017 — 2018
Portland State University
Master of Science - MS, Electrical and Computer Engineering
Easwari Engineering College(SRM Group)
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2018 — 2022
Rosily Matriculation Higher Secondary school
10th
2015 — 2016
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