Madhukar Palakurla
Sr Design Engineer 1 @Tessolve
Hyderabad, TG, IN
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Apr 2024 — Present
Sr Design Engineer 1 @Tessolve
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Hyderabad, IN
EDUCATION
2015 — 2019
Joginpally B.R Engineering College
Bachelor of Technology, Electronics and Communications Engineering
ABOUT MADHUKAR PALAKURLA
An ASIC Verification engineer by profession, I am also an individual contributor with a demonstrated history of working in the Semiconductor industry and Skilled in Verilog, SystemVerilog, and UVM with 2+ years of work experience in DV. B.Tech graduate in Electronics and Communication Engineering (ECE) from JNTU Hyderabad.
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