Madhu V
Sr. Lead Design Engineer-Physical Design at Qualcomm
- Role
- Senior Lead Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Madhu V
Having strong fundamental hands-on experience in Physical Design execution through handling diverse blocks in multiple projects (3nm-28nm). •Expertise in Floorplanning, Place & Route, Clock Tree Synthesis, RC-extraction, Timing closure and Physical verification.•Proficient in execution and debugging CTS issues like skew, insertion delay and timing violations.•Expertise in flip chip NETLIST to GDSII implementation which includes BUMP placement, PAD placement and RDL routing.•Skilled in Automation using TCL, Makefile and Shell Scripting. Ability to pickup new flows, learn on the job and influence QOR. And experience in PNR and Sign-off STA flow setup.•EDA Tools: Synopsys (ICC, ICC2, FC, PrimeTime, PrimeTime-ADV, StarRC and Formality), Cadence (Innovus), Mentor Graphics (Calibre), Apache (Redhawk) and Dorado (Tweaker).
Experience
Senior Lead Engineer
Nov 2024 — Present · Bengaluru, IN
Education
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, Microelectronics
Visvesvaraya Technological University
Bachelor's degree, Electronics and communications
2013 — 2017
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