Madan Kumar

About Madan Kumar

I am a verification engineer with 7.5 years of experience in VLSI, working across low-power and formal verification, along with 1.5 years of experience in software development. My work has largely focused on building and enabling low-power verification methodologies across formal and simulation environments.I have designed and developed low-power assertion libraries, power-aware simulation flows, and formal low-power verification frameworks, including power-aware connectivity checks, standard low-power checks, and retention optimization techniques. I have a strong understanding of power domains, UPF-based designs, and low-power architectures, and how these are applied in large-scale designs.I am skilled in UPF, SystemVerilog, UVM, TCL, and Python, and have also worked on an NLP-based machine learning solution. My objective is to apply this experience to verify complex SoCs and IPs, with a focus on scalable and robust low-power verification.

Experience

1. Staff Engineer

   Qualcomm

   Dec 2025 — Present

Education

• Bangalore Institute of Technology

  Bachelor of Engineering - BE

  2014

• National Institute of Technology Karnataka

  Master of Technology - MTech

  2016 — 2018