Luca Maroncelli

Lead CPU Architect | Matrix Compute & AI Accelerators

Role
Principal Engineer and Manager at 美商高通國際股份有限公司
Location
Austin, TX, US
LinkedIn followers
500 followers

About Luca Maroncelli

CPU design engineer

Experience

  1. Principal Engineer and Manager

    美商高通國際股份有限公司

    Nov 2024 — Present · Austin, TX, US

    Lead CPU Architect & Manager | Matrix Compute & AI Accelerators | Arm SME/SVE/SSVE & RISC-V AMEArchitecture & RTL: Evaluate and drive the adoption of Arm SME/SVE/SSVE ISA features. Lead the uArch definition and RTL implementation for the Qualcomm Matrix Engine.Power Architecture & Physical Design: Drive low-level silicon optimizations tailored for AI workloads. Define power and thermal management strategies, hardware throttling mechanisms and floorplanning for lower thermal density and higher sustainable throughput.Hardware-Software Ecosystem Ownership: Technical lead for CPU AI software execution. Drive HW-SW co-design, library optimizations, and benchmarking strategy.Industry Standardization: Involved with RISC-V and contributing to the definition of the RISC-V AME (Attached Matrix Extensions) specification to standardize the CPU-NPU interface.

Education

  • Università Politecnica delle Marche

    Electronic Engineer

    2012 — 2013

Skills

  • Systemverilog
  • Application-Specific Integrated Circuits (Asic)
  • Physical Design
  • Asic
  • Uvm
  • Clock Tree Synthesis
  • Place & Route
  • C++
  • Low-Power Design
  • Logic Synthesis
  • Verilog
  • Embedded Systems

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Luca Maroncelli — Principal Engineer and Manager at 美商高通國際股份有限公司 in Austin, TX, US | Unifers