Lokesh Sharma
Design Engineer @ NXP Semiconductors (Consultant) | Ex-STA Product Engineer Intern @ Cadence Design Systems | Ex-Research Intern @DEI SRFP 2022 | DEI\'24
- Role
- Design Engineer at 恩智浦半导体
- Location
- Agra, UP, IN
- LinkedIn followers
- 500 followers
About Lokesh Sharma
Hi, I\'m Lokesh Sharma, a B. Tech student at Dayalbagh Educational Institute majoring in…
Experience
Design Engineer
Jul 2024 — Present · Bengaluru, IN
Collaborated with the SRAM memory design team to optimize memory performance and reliability- Conducted the impact analysis of single-transistor and 6T SRAM bit-cell under diverse PVT conditions- Performed post-layout simulations and generated PPA reports (including leakage, timing, and power) for the different instances of the memory compiler using GF22FDX- Conducted nominal, Monte-Carlo and high-sigma yield analysis for 6T Bit-cell write time and Sense Amplifier resolve time- Contributed in writing timing and leakage-related measurements for the memory compilers- Optimized the Mica tool flow for the CCS timing model integration, enhancing critical path simulation accuracy- Automated tasks using shell scripts, enhancing workflow efficiency and reducing manual efforts.
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