Liang Xue
Head of Hardware Advanced Technology @ Astera Labs
- Role
- Associate VP, Si Pi, Post-si Ev, Adv Tech at Astera Labs
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
Experience
Associate VP, Si Pi, Post-si Ev, Adv Tech
Feb 2025 — Present
Education
Missouri University of Science and Technology
M.S., Electrical Engineering
2004 — 2006
Tsinghua University
B.S., Electrical Engineering
1999 — 2003
Skills
- Serdes
- Debugging
- Ic
- Analog Circuit Design
- Signal Integrity
- Mixed Signal
- Circuit Design
- Hardware Architecture
- Asic
- Integrated Circuits (Ic)
- Application-Specific Integrated Circuits (Asic)
- Spectrum Analyzer
- Pcie
- Semiconductors
- Spice
- Network Analyzer
- Pcb Design
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