Jason Lee

Pmts, Validation Systems Design Engineer, Dc Gpu @AMD

Burnaby, BC, CA
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Oct 2023 — Present

Pmts, Validation Systems Design Engineer, Dc Gpu @AMD

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Vancouver, BC, CA

Validation Content, Infrastructure and Automation Architect. Define methodology and strategy for customer platform validation and enablement on Instinct Product Lines.

EDUCATION

2007 — 2010

Simon Fraser University

Master of Applied Science, Computer Engineering

2002 — 2007

Simon Fraser University

Bachelor of Applied Science (B.A.Sc.), Electronics Engineering

SKILLS

Embedded SystemsIcModelsimSemiconductorsDebuggingSystemverilogFirmwareTclMipsAnalog CircuitsVerilogVhdlFpgaSilicon ValidationAsicEmbedded CDigital Electronics

ABOUT JASON LEE

Principal Member of Technical Staff Validation Systems Design Engineer

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Jason Lee — Pmts, Validation Systems Design Engineer, Dc Gpu at AMD in Burnaby, BC, CA | Unifers