Lavanya Romala
Sr Physical Design Application Engineer at Synopsys
- Role
- Sr Physical Design Application Engineer at Synopsys Inc
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Lavanya Romala
6+ years of experience as a Senior Physical Design Engineer Experience in EDA tools in the field of the VLSI industry Experience with process nodes such as TSMC 6nm and 12nm Have experience in Synthesis, Floorplanning, Placement, Clock Tree Synthesis, Routing, Static Timing Analysis, and ECO flow Hands-on experience in ASIC backend flow Good experience in prime time in fixing the time Good conceptual understanding of Physical Verification Flow Basic knowledge of TCL scripting
Experience
Sr Physical Design Application Engineer
Sep 2022 — Present · Hyderabad, IN
Education
Princeton College of Engineering & Technology for women
Master's Degree
2015 — 2017
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.