Lavanya Pudutha
SOC performance Verification Engineer
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Lavanya Pudutha
Expertise in System Verilog, C, C++* Knowledge on Computer architecture, have better understanding in GFX architecture and required blocks in the GFX* Expertise in understanding Memory Technologies. DDR/LPDDR* Expertise in Test Plan making for Performance Verification at SOC level* Expertise in automation using scripting languages like perl, shell, bash, TCl
Experience
Senior Silicon Design Engineer
Jul 2022 — Present · Hyderabad, IN
Education
National Institute of Technology Warangal
Master of Technology - MTech, VLSI System Design
2017 — 2019
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