Lavanya P
SoC Design Engineer
- Role
- System-on-chip Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Lavanya P
Looking forward to work in prestigious organizations which can provide a constructive and…
Experience
System-on-chip Design Engineer
Aug 2022 — Present · IN
Education
St. Lourdes High School, Mathikere, Bangalore
Schooling till SSLC
2001 — 2014
MES Prof. BRS PU College, Vidhyaranyapura, Bengaluru
PCME
2014 — 2016
Manipal School of Information Sciences
Master's degree, VLSI Design
2020 — 2022
Sapthagiri College of Engineering, BANGALORE
Bachelor's degree, Electrical, Electronics and Communications Engineering
2016 — 2020
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