Lathikashree M
Design Verification @ HCLTech | SystemVerilog • UVM • RTL Debug | VLSI | Semiconductor Design | Curious Learner
- Role
- Design Verification Engineer at HCLTech
- Location
- Chennai, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Lathikashree M
I am a passionate and detail-oriented VLSI Design Verification engineer with a solid…
Experience
Design Verification Engineer
Jul 2025 — Present
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