Lata Shrishail
Design Verification Trainee | 9 Months Experience | VLSI | RTL | System Verilog | UVM | ASIC | ECE 2023 Graduate
- Role
- Trainee at Maven Silicon
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EducationView LinkedIn profile
About Lata Shrishail
As a trained fresher in Advanced VLSI design and verification course, I\'m seeking an opportunities in semiconductor industry to enhance my knowledge and skills.
Experience
Trainee
Dec 2023 — Present · Bengaluru, IN
Education
RNS Institute of Technology - India
Bachelor of Engineering - BE
2019 — 2023
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