Lakshmi Kandula
Design Verification Engineer at Capgemini Engineering
- Role
- Design Verification Engineer at Capgemini Engineering
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Lakshmi Kandula
Recent graduate and Design Verification Engineer at Capgemini, passionate about VLSI design and verification. Skilled in Digital Electronics, Verilog, SystemVerilog, UVM and RTL design, with experience in Synopsys and ModelSim tools. Trained at Maven Silicon, where I worked on various VLSI projects involving design and verification methodologies. Eager to contribute to innovative semiconductor solutions and advance in the field of Design and Verification.
Experience
Design Verification Engineer
Mar 2025 — Present · Chennai, IN
Education
AP Model School Khajipet
Secondary Education
Rajiv Gandhi University of Knowledge Technologies, RKValley (RAC)
Bachelor of Technology - BTech, Electronics and Communication Engineering
Rajiv Gandhi University of Knowledge Technologies, RKValley (RAC)
Pre University Course(PUC)
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.