Kyukyoung Kim

Experience

1. Yield Excellence Engineer

   TSMC

   Jan 2025 — Present · Phoenix, AZ, US

   Daily Served as on-duty engineer for day/night shifts, managing wafer lot holds, controlling work-in-progress, and analyzing live defect cases to minimize yield loss semiconductor fabrication. Conducted daily defect trend analysis as Oxide Definition (OD) process loop owner, monitoring performance by tool, chamber, unit, or parameter to identify issues and implement corrective actions. Established baseline setups for Applied Materials Enlight recipes on new parts, fine-tuning parameters via defect image analysis to optimize process efficiency.Projects Collaborated with Process Integration and Lithography teams on energy matrix window analysis, defining optimal energy ranges for enhanced yield in semiconductor manufacturing. Performed Transmission Electron Microscopy (TEM) analysis to pinpoint defect elements, narrowing suspect loops to drive cross-functional quality improvements. Compared Continuous Improvement Process (CIP) and Process of Record (POR) to verify improvements using best-known methods analysis on yield and defect performance data from module departments.Excel Macro Developed Excel VBA macro to KLA defect data integration with inspection tools, enabling rapid FOV offset analysis. Created an Excel-based macro KIOSK displaying SOP lists by defect codes and KLA scan layer stages, accelerating on-duty resolutions to live defect cases. Built Excel macro to segment suspect loop tools by part, analyzing shared timestamps to identify common tools and defect root causes, enabling statistical process control for continuous improvements.

Education

• Stuyvesant High School

  High School Diploma

  2017

• University of Illinois Urbana-Champaign

  Bachelor of Science - BS

  2022