Kwonsu Cheon
Principal Dram i o Design Engineer @Samsung Electronics America
San Jose, CA, US
EMAILS
MOBILE NUMBERS
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WORK HISTORY
May 2024 — Present
Principal Dram i o Design Engineer @Samsung Electronics America
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San Jose, CA, US
EDUCATION
2000 — 2002
Seoul National University
MSEE, Electronics
1996 — 2000
Seoul National University
BSEE, Electronics
SKILLS
High Speed InterfacesAnalog Circuit DesignCircuit Simulation Tools Such as Hspice, Hsim Etc.Full Custom Design Tools Such as Cadence Opus, Hercules Lvs/Drc, Starrcxt Etc.DramCircuit DesignIbisSignal IntegrityFull Custom Design Ability Such as Dram, High Speed I/O, Cis, Adc, Pll/Dll EtcAnalog
ABOUT KWONSU CHEON
NAND Datapath & High speed IO Section Lead and Design Engineer - DRAM Design Engineer : Analog/Datapath/Array/Layout for LPDDR(1/2), DDR3 DRAM design- Analog & High speed Interface Design engineer : High speed interface (Tx/Rx) design for intra-Display chip (TCON)
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