Kush Thakkar
Design Verification Engineer @Chipsolve Technologies Private Ltd
Signup · Get unlimited contacts
WORK HISTORY
Design Verification Engineer @Chipsolve Technologies Private Ltd
Hyderabad, IN
EDUCATION
Vishwakarma Government Engineering College
Bachelor of Engineering - BE, Electronics and Communications Engineering
Nirma University
Master of Technology - M.Tech, VLSI Design
ABOUT KUSH THAKKAR
Design and Verification Engineer with hands-on experience in RTL integration and functional verification of IPs like APB UART, AXI-to-APB bridge. My expertise spans Verilog, SystemVerilog, and UVM, backed by proficiency in tools such as VCS, DVE, and ModelSim.At Numem, I contributed to complex verification tasks, collaborating with cross-functional teams to ensure robust and optimized IP integration. My academic foundation includes an M.Tech. in VLSI Design from Nirma University, where I honed my skills in digital design and verification methodologies, and have further strengthened my skills through a specialized course in Advanced VLSI Design and Verification from Maven Silicon.
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.