Kurugodupalli Manjunath

About Kurugodupalli Manjunath

I am physical Design Engineer working at wipro Technologies with 2 years experience and well versed with the EDA tools done projects in PnR, Logic Synthesis,STA,physical Verification SI analysis in different technologies. Skill Set: • ASIC back-end design flow from Synthesis to GDSII. • Strong background of CMOS logic design fundamentals. • Hands on experience with Synthesis and P&R tools. • Floor planning.Power planning, routing and analysis. • Clock Tree Synthesis,Place & Route. • Timing analysis and timing closure,Signal Integrity closure. • Power analysis, Low power checks and implementation. • ECO generation, DRC/LVS clean up. • Formal verification, Physical verification, sign-off checks

Experience

1. Senior Staff Engineer

   Marvell Technology

   May 2024 — Present · Bengaluru, IN

Education

• Narayana Junior College

  High School

  2007 — 2009

• Kottam Karunakara Reddy Institute of Technology, Kurnool

  Bachelor’s Degree

  2009 — 2013

• Lovely Professional University, Punjab

  Master’s Degree

  2013 — 2015

Skills

• Management
• Leadership
• Asic
• Analysis
• Microsoft Word
• Linux
• Powerpoint
• Team Management
• Vlsi
• Electronics
• Analog
• Matlab
• Drc
• Project Management
• Physical Design
• Cadence Encounter
• Lvs
• Eda
• Rtl Verification
• Microsoft Office
• Circuit Design
• Rtl Design
• Cmos
• Customer Service
• Simulations
• Very-Large-Scale Integration (Vlsi)
• Integrated Circuit Design
• Cadence Virtuoso Layout Editor
• Verilog
• Application-Specific Integrated Circuits (Asic)
• Sales
• Logic Synthesis
• Strategic Planning
• C
• Tcl
• Pnr
• Cadence Virtuoso