Kunal Wakode

Director of Engineering, SOC Design Verification

Role
Director of Engineering at Intel
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About Kunal Wakode

Director of Engineering and Technical Leader with 20+ years of experience in design verification. Experience in verification of SoC use cases from IP-> Cluster-> SoC-> Pkg -> Firmware->Driver & SW interactions. Currently Verification site lead for NEX for HYD and E2E Verification lead for Intel’s next gen AI PC. SKILLSExperience in all aspects of SoC, Cluster and Unit level verification ranging from specifying, implementing, and utilizing the verification environment to establish directed and random DV methodologies, develop verification test plans, track and resolve design bugs, debug the design at RTL and gate level. Hands on experience on pre-silicon simulation/emulation, Hybrid SLE (System level Emulation), FW/SW/Driver verification post-Silicon SoC verification.

Experience

  1. Director of Engineering

    Intel

    Jan 2024 — Present · Hyderabad, IN

Education

  • Birla Institute of Technology & Science, Pilani

    Master of Engineering (M.Eng.), Microelectronics

    1998 — 2000

Skills

  • C++
  • Soc
  • Ic
  • Debugging
  • Systemverilog
  • Randomization
  • C
  • Vlsi
  • Testing
  • Functional Verification
  • Uvm
  • Fpga
  • Asic
  • Nlp
  • Rtl Design
  • Mixed Signal
  • Processors
  • Verilog
  • Semiconductors
  • Power Management
  • Assertion Based Verification
  • Microprocessors
  • Vhdl
  • Simulations
  • Code Coverage
  • Perl
  • Embedded Systems
  • Eda

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Kunal Wakode — Director of Engineering at Intel in Hyderabad, TG, IN | Unifers