Kunal Sengupta
Asic Verification Engineer @Apple
Munich, DE
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MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Mar 2025 — Present
Asic Verification Engineer @Apple
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Munich, DE
EDUCATION
2012 — 2012
RV VLSI Design Center
Advanced Diploma - 5 months, ASIC Design (VLSI)
2015 — 2017
Birla Institute of Technology and Science, Pilani
Master of Technology (M.Tech.), Microelectronics
2005 — 2009
St. Vincent Pallotti College of Engineering & Technology
B.E., Electronics and Telecommunications
ABOUT KUNAL SENGUPTA
ASIC Verification EngineerIP and SoC Verification using UVM/SystemVerilog/SVAsSystemVerilog, UVM, SVAs, Verilog, VHDL, C/C++AHB/AXI/JTAGTestPlan Development, and ImplementationTB ArchitectureRTL VerificationRegister ModelingGate Level Netlist VerificationMixed Signal VerificationSystemVerilog and SVAs for VerificationCode Coverage and Functional Coverage
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