Kunal Kulkarni
Component Design Engineer at Intel
- Role
- Component Design Engineer at Intel
- Location
- Seattle, WA, US
- LinkedIn followers
- 500 followers
About Kunal Kulkarni
Completed my Masters in Computer Engineering from the North Carolina State University, I specialized in ASIC Design/Verification along with courses in Computer Architecture.My skills are - Proficient in ASIC design and synthesis, setup & hold timing analysis, STA, TLM- Experience in SRAM Memory design, circuit schematics, layout in 15nm FreePDK, DRC and LVS, Parasitic Extractions- Exposure to functional verification of microcontrollers, constrained random testing, assertions by building a layered and a reusable testbench- Extensive knowledge of Computer Architecture - out-of-order superscalar microarchitecture, Instruction level parallelism, cache hierarchy, parallel architectures, cache coherence protocols (MSI, MESI, MOESI, Dragon),memory consistency models and branch predictors- Scripting in Python and Perl (File parsing using Regular expressions)
Experience
Component Design Engineer
May 2021 — Present
Education
Vivekanand Education Society's Institute Of Technology
Bachelor's degree, Electronics and Telecommunications
2011 — 2015
North Carolina State University
Masters, Computer Engineering
2015 — 2017
Skills
- Fpga
- Asic
- Windows 8
- Vhdl
- Mentor Graphics Calibre
- Cadence Virtuoso
- Xilinx Ise
- Perl
- Code Composer Studio
- Microsoft Office
- Modelsim
- Synopsys Tools
- Arduino
- Red Hat Linux
- C
- Python
- C++
- Systemverilog
- Application-Specific Integrated Circuits (Asic)
- Embedded C
- Rtl Design
- Verilog
- Pspice
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