Kumar Raghavendra
Principal Design Engineer
- Role
- Principal Design Engineer at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Kumar Raghavendra
Accomplished Physical Design Engineer with 9 years of experience in the semiconductor industry, specializing in various aspects of physical design from oorplanning to GDS.Track record in showcasing exceptional performance, expertise in physical design, static timing analysis, place & route, ECO implementation, LEC, physical verication, ow integration, signal EM/IR analysis, and prociency in TCL scripting for ecient design processes and debugging.Proven leadership abilities in team management, technical guidance, and complex issue resolution. Committed to driving innovation, optimizing performance, and exceeding client expectations.Proven track record of achieving exceptional results in designing high-complexity projects with instance counts exceeding 4 million, across various cutting-edge technology nodes ranging from 28nm to 7nm. Proficiently handled clock frequencies surpassing 1 GHz.Procient in utilizing industry-leading tools such as ICC2, Fusion Compiler, Primetime, Innovus, Design Compiler, Calibre, StarRC, Formality, Conformal, and ICV to deliver exceptional results.
Experience
Principal Design Engineer
Jul 2024 — Present
Education
K.L.E. Society's S. Nijalingappa College (KLE SNC), Bengaluru
Pre-University, Pre University
2009 — 2011
Rajarajeswari College of Engineering(RRCE)
Bachelor of Engineering (B.E.), Electronics and Communications Engineering
2011 — 2015
Skills
- Operating Systems
- Powerpoint
- C
- Engineering
- Verilog
- Leadership
- Microsoft Word
- Team Leadership
- Telecommunications
- Photoshop
- Matlab
- Troubleshooting
- C++
- Microsoft Office
- Xilinx Ise
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