Kumar Manas Khare
SoC Design Engineer (Power Optimization) at Google
- Role
- Soc Design (Power Optimization) at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Soc Design (Power Optimization)
Dec 2023 — Present · Bengaluru, IN
Working on Pre-Si ASIC power estimation and optimization through tools like Primetime PX, Primepower, Powerartist etc. Proficient in analysing RTL power to find power reduction opportunities through Clock gating, Power Gating, Architectural changes, etc.
Education
Institute of Engineering & Technology DAVV, Indore
Bachelor of Engineering - BE
2012 — 2016
Birla Institute of Technology and Science, Pilani - Goa Campus
Master of Engineering - ME
2018 — 2020
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