Kumar Kanti Ghosh
Apple Engineering | Ex-Qualcomm
- Role
- Cellular Soc Chip Lead at Apple
- Location
- San Diego County, CA, US
- LinkedIn followers
- 500 followers
About Kumar Kanti Ghosh
Experienced ASIC Design Engineer with a demonstrated history of working in the…
Experience
Cellular Soc Chip Lead
Dec 2020 — Present · San Diego, CA, US
In my role as the Cellular SOC Chip Lead at Apple in San Diego, I managed a team and resources to ensure timely delivery of RTL to Netlist for physical implementation and GDS delivery. Working closely with cross-functional teams, I facilitated seamless collaboration and successful project outcomes, contributing to the advancement of cellular technology.
Education
National Institute of Technology Kurukshetra
B. Tech
1995 — 1999
University of Minnesota-Twin Cities
MS
2001 — 2003
Skills
- Primetime
- Functional Verification
- Silicon
- Asic
- Embedded Systems
- Eda
- Verilog
- Tcl
- Systemverilog
- Soc
- Static Timing Analysis
- Semiconductors
- Logic Synthesis
- Ncsim
- Vhdl
- System on a Chip (Soc)
- Vlsi
- Timing Closure
- Rtl Design
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