Kshitij Saxena
SoC Modeling Engineer || VLSI Design || C,C++ Programming || Digital Electronics || Verilog || Linux || FPGA || Hardware system Design
- Role
- Soc Modeling Engineer at Circuitsutra Technologies
- Location
- Delhi, IN
- LinkedIn followers
- 500 followers
About Kshitij Saxena
Holding a keen interest in,++, and, I aim to work on more and more projects honing my skill set as I go. in Digital Logic System Design, C, C++, Verilog, Microsoft Office, UI/UX Designing, and Event management. of Verilog, Xilinx ISE, Xilinx Vivado, Digital Logic, HTML, CSS, Javascript, and MERN Full-stack. Pursuing my at Maharaja Surajmal Institute of Technology. Holding a CPGA of 9.054, ranking higher than.% of other Batchmates. Held many roles in leading multiple college societies- at Student Branch of MSIT for Mutants Cultural Society, at Octave Music Society
Experience
Soc Modeling Engineer
Jul 2023 — Present · Bengaluru, IN
Education
Maharaja Surajmal Institute Of Technology
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2019 — 2023
N K Bagrodia Public School
Senior secondary, Non Medical
2005 — 2019
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