Krishnaveni Visarapu
Experienced Post-Silicon Validation Engineer | 2 Years 8 months of Expertise in Hardware Debug & Validation
- Role
- Post Silicon Validation Engineer at Intel
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Post Silicon Validation Engineer
Jan 2022 — Present · IN
Education
Godavari Institute of Engineering & Technology (GIET), NH-5, Chaitanya nagar, Velaguvanda Village, Rajanagaram(M),Rajahmundry,PIN- 533296 (CC-55)
Bachelor's degree
2016 — 2020
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