Krishnabir Ghosh

About Krishnabir Ghosh

ASIC RTL Design Engineer with more than 14 years of experience is looking for opportunity within/outside India. Has worked in many Product based organization like Samsung, Qualcomm, Intel and currently working in Arm. Rich knowledge of ASIC system and collaterals. Extensive working experience in Power Management, Memory Management and Debug IPs. Worked as Micro-architect for Power Management Controller with expertise on Boot and Reset.Currently leading Security and RAS for a data centre ASIC. This is multi-die ASIC and requires security design for practical boot, access control and debug. Have led Ambient and Audio Processing Subsystem and Run Time Security Engine, which involves resource planning, tracking and boiling down micro-architecture from the PRS. Have hands on experience in many flow tools such as VCS, UPF, Spyglass Lint, Spyglass CDC, CLP and many more. Experience in delivery of multiple IPs across multiple market segments. Have experience in ECOs and GLS debugs.

Experience

1. Principal Engineer

   Arm

   Apr 2026 — Present · Bengaluru, IN

   Currently leading Security and RAS features of a multi Die Data Center ASIC. This requires deriving requirement from PRS, constant interaction with Architecture team to build the microarchitecture. Defining and implementing the register spec. Defining multiple APB decoder points and corresponding pipeline requirement based on PD feedback. Started at ARM as CPUSS Design Engineer as an IC and slowly moved to Techno Leadership role, leading two subsystems Ambient & Audio SS and Run time Security Engine SS for an IOT product.

Education

• Indian Institute of Technology, Madras

  Master of Technology - MTech, VLSI

  2017 — 2020

Skills

• C
• Gnu Debugger
• Verilog
• Linux
• Unix
• Embedded Systems
• Data Structures
• Asic
• Application-Specific Integrated Circuits (Asic)