Kratika Jakhar
Working with standard cell team for initial qualification of libraries, through PnR
- Role
- Lead Design Engineer at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Kratika Jakhar
Seeking a Challenging position as a Physical Design Engineer/Layout design engineer that…
Experience
Lead Design Engineer
Aug 2025 — Present · Bengaluru, IN
Education
The University of Glasgow
Master of Science (MS)
2012 — 2013
Rajasthan Technical University Kota India
Bachelor of Technology (BTech)
2006 — 2010
Skills
- Perl
- Semiconductor Fabrication
- Design Rule Checking (Drc)
- Rtl Design
- Physical Design
- Application-Specific Integrated Circuits (Asic)
- Ic Compiler
- Dc Compiler
- Clock Tree Synthesis
- Static Timing Analysis
- Testing
- Cmos
- Logic Design
- Lvs
- Layout Versus Schematic (Lvs)
- C++
- Cadence Virtuoso
- Asic
- Floorplanning
- Drc
- Microsoft Word
- Placement
- Questasim
- C
- Linux Desktop
- Calibre
- Primetime
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