Kranthi Kasibhatla
Hardware - Memories/PDK/CAD/PD/STA
- Role
- Silicon Engineer at Meta
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Kranthi Kasibhatla
Hardware Engineering professional with 20 years of experience in Design Engineering and Technical Customer Interaction roles for high-speed ASIC chips in advanced nodes including 7nm & 5nm. Expertise in Synthesis, PnR, STA and EDA tools.
Experience
Silicon Engineer
Jan 2026 — Present
Education
Kakatiya University
BS, Electrical and Electronics Engineering
1996 — 2000
The University of Toledo
MS, Electrical Engineering
2000 — 2002
Skills
- Place and Route
- Verilog
- Logic Synthesis
- Circuit Design
- Icc
- Simulations
- Static Timing Analysis
- Ic
- Cmos
- Rtl Design
- Semiconductors
- Asic
- Cts
- Perl
- Eda
- Sta
- Vlsi
- Physical Design
- Soc
- Timing
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