Koushik de

About Koushik de

Core Engineering & Technical Skills (Engineering → Electrical, VLSI, IC Design, Semiconductor)• Analog & Mixed-Signal IC Design• High-Speed Interface IP (SERDES, DDR, D2D, Mipi PHY)• ADC/DAC Architectures & Design• Phase-Locked Loops (PLLs) & Clocking Circuits• Power Management ICs (PMIC)• High-Speed Communication Circuits• On-chip Sensors & PVT Monitoring• Silicon Validation & Test Chip Development• Mixed-Signal System Integration• Advanced Process Nodes (7nm, 5nm, 3nm and Technology Leadership & Management (Leadership & Management → Engineering Management)• IC Design Engineering Management• Cross-functional R&D Leadership• Team Building & Talent Development• Technical Strategy & Execution• Program & Project Management (Specification-to-Production Flow)• Innovation & IP Development (Patents & Publications)• Quality Benchmarking & Workflow Industry & Domain Expertise (Industry Knowledge → Semiconductors & Electronics)• Semiconductor Industry Leadership• Automotive IC Standards (ISO 26262, AEC-Q100)• Consumer Electronics IC Design• 5G Communication ICs• Industrial & Automotive ICs• Reliability & Compliance Engineering• Interface Standards (PCIe, LPDDR, Ethernet Emerging & Future-Focused Skills (Technology → AI/ML, Digital Transformation)• AI/ML in Circuit Design & Optimization• AI-driven Analog/Mixed-Signal Design Methodologies• Integration of AI in Semiconductor R&D

Experience

1. Director of Design Engineering

   Cadence

   May 2024 — Present · Hyderabad, IN

Education

• Kalyani Govt Engineering College

  BTech, Electronics & Communication Engineering

  1998 — 2002

• Indian Institute of Technology, Kharagpur

  MSEE, Analog Design, MEMS Sensors & interface

  2003 — 2005

Skills

• Debugging
• Mixed Signal
• Electronics
• Sensors
• Cmos
• Analog
• Ic
• Soc
• Bicmos
• Fpga
• Microfabrication
• Asic
• Analog Design
• Cadence Virtuoso
• Vlsi
• Dac
• Analog Circuit Design
• Adcs
• System on a Chip (Soc)
• Low-Power Design
• Mems
• Microsystems