Naveen K
Physical Design Engineer at Chipsolve Technologies | M.Tech in VLSI DESIGN.
- Role
- Physical Design Engineer at Chipsolve Technologies Private Ltd
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Naveen K
Physical Design Engineer has more than 1+ years of ASIC physical design experience…
Experience
Physical Design Engineer
Chipsolve Technologies Private Ltd
Apr 2025 — Present · Hyderabad, IN
Education
Aditya University
Master's degree
2021 — 2024
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.