Kommisetty Sruthi

DFT Engineer at Intel Technology India Pvt Ltd

Role
Dft Design Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Kommisetty Sruthi

2.8 years of experience in DFx validation implementation for Taplink network JTAG, LCP, IOV at SOC and Tile level.•Generating, running, debugging taplink JTAG, IJTAG, CLTAP,ENDEBUG,LCP and IOV testcases.•Close Collaboration with RTL,MPP and DFFM team for fixing the RTL and Specfile.•Comfortable in linux environment and writing / using scripting languages such as perl,awk,sed etc.•Hands on experience in verdi tool.

Experience

  1. Dft Design Engineer

    Intel

    May 2024 — Present · Bengaluru, IN

Education

  • Andhra Engineering College

    Bachelor of Technology - BTech

    2015 — 2019

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Kommisetty Sruthi — Dft Design Engineer at Intel in Bengaluru, KA, IN | Unifers