Kodandaram Gadepalli
Silicon Design Engineer @Meta
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WORK HISTORY
Silicon Design Engineer @Meta
Hyderabad, IN
EDUCATION
JNTU Kakinada
Bachelor of Technology (BTech), Electronics and Communications Engineering
Board Of Intermediate Education
XII th, Maths Physics Chemistry
Central Institute of Tool Design
Post Graduate, VLSI and Embedded Systems
St Anns Em High School
X th
SKILLS
ABOUT KODANDARAM GADEPALLI
A seasoned Semiconductor Electronics professional bringing 13+ years of enriched experience. Possesses strong skills in Synthesis, Static Timing Analysis (STA), and achieving robust Timing Closure at Block and full-chip level. Experience at Constraints Generation and Management for complex hierarchical designs. Demonstrates a good understanding of Verilog/SystemVerilog for effective coding and debugging. Hands-on experience with power-aware design techniques utilizing CPF/UPF for multi-voltage implementations. Currently engaged in the development of leading-edge high-performance designs.
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