Kodandaram Gadepalli

Silicon Design Engineer @Meta

Hyderabad, TG, IN
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Dec 2025 — Present

Silicon Design Engineer @Meta

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Hyderabad, IN

EDUCATION

2006 — 2010

JNTU Kakinada

Bachelor of Technology (BTech), Electronics and Communications Engineering

2004 — 2006

Board Of Intermediate Education

XII th, Maths Physics Chemistry

2011 — 2013

Central Institute of Tool Design

Post Graduate, VLSI and Embedded Systems

1994 — 2004

St Anns Em High School

X th

SKILLS

DebuggingXilinxSystemverilogCVlsiXilinx IseRtl DesignSocVhdlAnalog Circuit DesignI2cLogic DesignNcsimPerl AutomationLow-Power DesignArmLogic SynthesisApplication-Specific Integrated Circuits (Asic)CadenceCadence VirtuosoPerlEmbedded SystemsStatic Timing AnalysisDigital ElectronicsSynopsys ToolsVerilog-AmsTiming ClosureCircuit DesignCmosSpiAmba AhbIntegrated Circuit DesignMicroprocessorsVery-Large-Scale Integration (Vlsi)Rtl CodingModelsimTclVerilogFpgaAsic

ABOUT KODANDARAM GADEPALLI

A seasoned Semiconductor Electronics professional bringing 13+ years of enriched experience. Possesses strong skills in Synthesis, Static Timing Analysis (STA), and achieving robust Timing Closure at Block and full-chip level. Experience at Constraints Generation and Management for complex hierarchical designs. Demonstrates a good understanding of Verilog/SystemVerilog for effective coding and debugging. Hands-on experience with power-aware design techniques utilizing CPF/UPF for multi-voltage implementations. Currently engaged in the development of leading-edge high-performance designs.

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Kodandaram Gadepalli — Silicon Design Engineer at Meta in Hyderabad, TG, IN | Unifers