Ko-Chung Tseng
ASIC Design Engineer/Manager
- Role
- Principal Engineer at SK hynix memory solutions America Inc.
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Ko-Chung Tseng
Ko-Chung Tseng has great passions on storage SoC/device and AI industry. He is currently a Design Manager at Chigma Technolgy. Prior to joining SanDisk, he worked for Marvell SNG for three years as a senior ASIC design engineer and SanDisk as a staff design engineer. He received his Ph.D. degree in Electrical Engineering from USC in 2012. During his Ph.D coursework, he held research assistant (RA) position under Prof. Alice C. Parker at USC BioRC Lab. Meanwhile, he was a teaching assistant (TA) in VLSI and ASIC design classes at USC for 5 years. He also recieved two M.S. degrees in Electrical Engineering and Computer Science at USC in 2005 and 2009 respectively. He completed his B.S. degree in Communication Engineering from National Chiao Tung University in Taiwan.His research interest includes neuromorphic circuit design, digital circuit design, computational algorithm, memory design, computer architecture, and etc.
Experience
Principal Engineer
SK hynix memory solutions America Inc.
Jul 2025 — Present · San Jose, CA, US
Education
University of Southern California
Doctor of Philosophy (PhD), Electrical and Electronics Engineering
2006 — 2012
University of Southern California
Master of Science (MS), Computer Science
2008 — 2009
University of Southern California
Master of Science (MS), Electrical and Electronics Engineering
2004 — 2006
National Chiao Tung University
Bachelor's degree, Electrical, Electronics and Communications Engineering
1999 — 2001
Skills
- Computer Architecture
- Soc
- Circuit Design
- Javascript
- Cadence Soc Encounter
- Systemverilog
- Java
- Spice
- Cadence Ocean Script
- Python
- Cadence Conformal Logic Equivalence Checking
- Cadence Virtuoso
- Algorithms
- Synopsys Primetime
- Synopse Design Compiler
- Xml
- C++
- Verilog
- Html
- Vlsi
- Matlab
- Hspice
- Php
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