Kishan N
Analog Layout Design Engineer at Marvell Semiconductor
- Role
- Senior Analog Layout Design Engineer at Marvell Technology
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Kishan N
Worked on different architectural Chip top SERDES layout. • Good at power planning…
Experience
Senior Analog Layout Design Engineer
Feb 2018 — Present · IN
Education
Visvesvaraya Technological University
Bachelor’s Degree
Skills
- Debugging
- Sram
- Cadence Virtuoso
- Vlsi
- Electronics
- Cmos
- Analog Layout Design
- Verilog
- Linux
- Drc
- Lvs
- Floor Plans
- Pex
- Caliber
- Standard Cell
- Semiconductors
- Asic
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