Kiran Koratikere Srinivasa

About Kiran Koratikere Srinivasa

Over 13 years industry experience with insight into RTL development, Physical design and custom circuit design with specialization in custom memory circuit design. Demonstrated ability in technical leadership in driving projects to tapeout.*Over 2 years of experience in structured data path design using auto place and route tools.*RTL2GDS implemention using industry standard auto place and route tools.*Experience in designing high speed and high density 6T arrays as well as custom single port and multi port register file memory arrays.*Experience in characterizing and optimizing SRAM circuits for PPA.*Experience in designing read and write assist circuits for high density memory arrays.*2 years work experience in RTL development.*Over 2 years of experience in flow automation using PERL.Specialties: Transistor level Simulations – HSPICE. Schematics,Layout – Virtuoso.DRC/LVS – Calibre. Timing - Nanotime, PrimetimeEMIR - TotemScripting: PERL,Shell. Logic design using HDLs: Verilog, VHDL.

Experience

1. Senior Engineer

   NVIDIA

   Aug 2023 — Present

Education

• Arizona State University

  Master's degree, Integrated Circuit Design

  2010 — 2012

• Visvesvaraya Technological University

  Bachelor of Engineering, Electronics and Communication

  2003 — 2007

• The National Institute of Engineering

  BE, Electronics and communication

  2003 — 2007

Skills

• Memory Test - Bist Design
• Shell Scripting
• Perl
• Verilog
• Dft
• Rtl Design
• Circuit Design
• Analog Circuit Design
• Cadence Virtuoso
• Gate Level Simulations
• Cadence Spectre
• Memory Design
• Logic Design
• Vlsi
• Vhdl
• Spectre
• Digital Electronics
• Bist
• Simulation
• Digital Design
• Computer Architecture
• Lvs
• Cmos
• Hardware Design
• Vcs
• Debugging
• Ncsim
• Sram
• Modelsim
• Xilinx
• Rtl Coding
• Drc
• Virtuoso Layout Editor
• Functional Verification
• Scripting
• Hspice
• Asic
• Cadence
• Eda
• Simulations