Kiran Kanth Dabbiru

About Kiran Kanth Dabbiru

Physical Design Methodology & AI/Machine Learning• Led RTL-to-GDSII implementation of CPU/GPU/NPU products on advanced process nodes (2nm, 3nm), delivering production-quality designs across multiple technology generations.• Architected intelligent agent-based systems leveraging LLMs to automate and optimize semiconductor design workflows across synthesis, place-and-route, and signoff (timing/power/signal integrity) domains.• Drove physical implementation from synthesis to signoff closure for both block-level and full-chip designs, ensuring PPA targets and manufacturability requirements.• Developed metric-driven PPA optimization flows for ARM CPU and GPU architectures, improving design quality and reducing iteration cycles.• Built and deployed machine learning solutions using Scikit-Learn for predictive modeling and TensorFlow/PyTorch for deep learning applications in EDA automation.

Experience

1. Synthesis & Physical Design Engineering, Architect

   Synopsys Inc

   Mar 2024 — Present

Education

• Andhra University

  Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering

  1998 — 2002