Kiran Tholu

About Kiran Tholu

VLSI Design professional with 19 years of extensive experience in project and team management, Architecture, Design and Quality Assurance of FPGA IPs and ASIC designs. Proven track record in multiple tape-outs and Soft IP productization across various domains, including data centres, storage, networking, and SoCs. Experienced in Architecture, Microarchitecture, RTL design, Post-silicon validation, Prototyping, and DV using SystemVerilog (SV) OVM/UVM.ASIC / FPGA / SoCPublication: CECP 2.0 certified. Projects include: High B/W switching, RDMA, 10, 25, 40, 50 & 100G Ethernet, MACSec, 10GE Mappers, L2 Switching.

Experience

1. Smts Silicon Design Engineer

   AMD

   Mar 2018 — Present · Hyderabad, IN

Education

• Jawaharlal Nehru Technological University

  Bachelor of Technology - BTech, Electircal and Electronics Engineering

  1999 — 2003

• Narayana Junior college

  Intermediate, MPC

  1997 — 1999

• Jawaharlal Nehru Technological University

  Master of Technology - MTech, VLSI System Design

  2003 — 2005