Kiran Bhukya
Physical Design Engineer @Samsung Semiconductor
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WORK HISTORY
Physical Design Engineer @Samsung Semiconductor
Bengaluru, IN
EDUCATION
Indian Institute of Information Technology Design & Manufacturing Kancheepuram
Dual degree (B.Tech. ECE + M.Tech. VLSI)
IIT STUDY CENTRE,RAJENDRANAGAR,HYDERABAD
Intermediate , M.P.C
T.T.W.R School Warangal India
secondary board, 5th to 10th Class
ABOUT KIRAN BHUKYA
I am working as a Physical design engineer at Samsung Semiconductor from Leadsoc Technologies.I have completed B. Tech. Electronics and Communication Engineering +M. Tech. VLSI System Design from Kancheepuram.> Hands-on experience with various EDA tools ( IC Compiler, fusion compiler, Redhawk, Primetime, Calibre)> In-depth knowledge of ASIC flow, including the various stages and processes involved in ASIC Physical Design flow from Netlist to GDS2.> Worked on 3nm, 4nm, 5nm, 8nm technologies> Worked as both PNR and EMIR engineer> Good at Floorplan, Power planning, Placement, CTS, Routing and signoff finding the issues and fixing them.> Good understanding of Power Analysis (EMIR) including dynamic IR, static IR, powerEM, signalEM, thermalEM and rampup.> Good knowledge of Digital design Concepts, CMOS, Digital IC Design, TCL scripting, and Linux.Areas of Interest-> Physical Design> EMIR Analysis> Static Timing Analysis> physical verification
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