Khyathi Rajeerkula
Trainee Engineer - Asic Verification @MosChip®
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WORK HISTORY
Trainee Engineer - Asic Verification @MosChip®
EDUCATION
Stanley College of Engineering and Technology for Women
Electronics and Communication Engineering
SR Junior College
Mathematics Physics and Chemistry (MPC)
Stanley college of engineering and technology for women
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
Nalanda High School
Certificate, Secondary School Certificate (SSC)
ABOUT KHYATHI RAJEERKULA
I am seeking to kick start my career in VLSI industry skills:Digital Electronics VerilogSystem Verilog Universal verification MethodologyUVM RAL(Register Abstraction Layer)PERLprojects:APB based Ethernet ProtocolAMBA APB protocolcustomized Up-Down CounterArithmetic Logic UnitSynchronous FIFOTools:QuestaSimEDA
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