Khusro Sajid

About Khusro Sajid

As a Principal Static Timing Analysis Flow and Methodology Lead at Marvell Technology, I leverage my multiple years of experience in the semiconductor industry to lead platform-level static timing analysis signoff methodology definition and specification. Multidie STA, Simultaneous Multi Voltage Analysis, POCV and timing derating methodologies, process, voltage, and temperature corner selection, clock mesh analysis and annotation in STA, hierarchical block modeling for STA, timing robustness strategies and STA/Spice correlation and accuracy determination.Advanced level understanding of power grid EM, signal EM and voltage drop analysis and and its mitigation strategies including power grid correction/optimization, decap cell placement, package/board parasitic impact on on-chip voltage drop and using hierarchical modeling approaches for runtime optimization.Deep understanding of extraction flows, and physical design construction flows including placement, routing, DRC fix.I am passionate about solving complex technical challenges and delivering innovative solutions that enhance the performance and reliability of semiconductor products.

Experience

1. Principal Static Timing Analysis Flow and Methodology Lead

   Marvell Technology

   Nov 2021 — Present · US

   Adept at both STA flow development and STA Signoff execution on current Marvell chips.Enabled next generation Static Timing Analysis Methodology and FlowsMentor engineering talentPartition Static Timing Analysis Closure

Education

• Indian Institute of Technology, Kharagpur

  Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering

• University of Arizona

  Master's degree, Computer Engineering

Skills

• Application-Specific Integrated Circuits (Asic)
• Vlsi
• Tcl
• Low-Power Design
• Very-Large-Scale Integration (Vlsi)
• System on a Chip (Soc)
• Physical Design
• Cmos
• Verilog
• Primetime
• Perl
• Eda
• Asic
• Cadence
• Ic
• Static Timing Analysis
• Unix
• Soc
• Spice
• Signal Integrity
• Semiconductors