Mohammad Khalique Khan
Engineer @ Cadence | DV | RTL
- Role
- Application Engineer at 铿腾设计系统公司
- Location
- New Delhi, DL, IN
- LinkedIn followers
- 500 followers
About Mohammad Khalique Khan
Experienced Design Verification Engineer with 3 years of industry experience in…
Experience
Application Engineer
Jun 2022 — Present · Noida, IN
System and Verification Group at Cadence Design Systems, my primary responsibility is to provide technical expertise and guidance to RTL and DV professionals for their hardware designs and verification projects. Writing test cases to achieve functional coverage and assertions, GLS Sign-off and randomized test scenarios. I work closely to help them achieve their goals and optimize their design flows by improving performance, RTL and Gate Level timing Simulation, including resolving issues like debugging tools and design verification environments.
Education
Aliah University, Kolkata
Bachelor of Technology
2019 — 2022
Aligarh Muslim University
Diploma in Engineering
2016 — 2019
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