Khachatur Armenyan

Asic Design Engineer @Aeva

Mountain View, CA, US
MOBILE NUMBERS
+14•••••••93

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WORK HISTORY

Jul 2021 — Present

Asic Design Engineer @Aeva

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Mountain View, CA, US

EDUCATION

1997 — 2003

State Engineering University of Armenia

Ms degree, Radioelectronics and communication

SKILLS

TclVerilogSpiceModelsimShell ScriptingEdaSocFpgaStatic Timing AnalysisLogic SynthesisIntegrated Circuit DesignVhdlIcDebuggingTiming ClosureAsicVlsiAlgorithmsPhysical DesignMicroprocessorsXilinxAlteraDrcPhysical VerificationSemiconductorsMixed SignalRtl DesignTestingLinuxUnixVery-Large-Scale Integration (Vlsi)

ABOUT KHACHATUR ARMENYAN

As an ASIC Design Engineer at Aeva, I design and verify integrated circuits for sensing and perception systems that enable autonomous driving. I have 18+ years of experience in digital design, verification, DFT, and customer interaction, working on various chip design disciplines and cross-site teams.I have demonstrated expertise in Verilog HDL, clocking, reset, power management, clock and voltage domain interfaces, and synchronizers. I have also participated in multiple SoC architecture specifications, familiar with Arteris NoC interconnect and performance analysis. I have led numerous silicon chip debug efforts, bringing together multi-disciplinary teams to root-cause complex silicon issues. I am eager to learn new skills and meet new challenges, and I am a team player who adds both practical and organizational insight to my projects. I have excellent presentation skills with extensive classroom teaching and demo experience.

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Khachatur Armenyan — Email, Phone Number & Contact Info | Unifers