Ketul Patel
Functional Verification Engineer at IBM | Former CPU Architecture Verification Engineer at Arm | M.Tech (VLSI & Embedded Systems) From DA-IICT
- Role
- Functional Verification Engineer at IBM
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Ketul Patel
I am Master of Technology Student at Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar. My area of Interest is VLSI, ASIC Design, Processor Design. I have successfully Completed 5 Weeks Training at Cadence Design Systems, Bangalore.
Experience
Functional Verification Engineer
Jul 2022 — Present · Bengaluru, IN
Education
Dhirubhai Ambani University
Master of Technology - MTech, VLSI And Embedded Systems
2017 — 2019
SHETH SHREE I. N. PATEL SWAMINARAYAN VIDHYALAY, AHMEDABAD
Schooling , Science
2003 — 2011
INSTITUTION OF ELECTRONICS AND TELECOMMUNICATION ENGINEERS, New Delhi
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
2012 — 2015
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