Keerthanaa Bhoopathy
ECE Grad Student at PSU | DV Intern at Qualcomm | Ex AMD | Design Verification | Computer Architecture
- Role
- Interim Engineering Intern at Qualcomm
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Keerthanaa Bhoopathy
Graduate student in Electrical and Computer Engineering from Portland State University with over three years of industry R&D experience in embedded software development. Actively seeking internship opportunities in Design Verification, Validation, and Computer Architecture. Eager to apply expertise gained through coursework in SystemVerilog, Pre-Silicon Validation, UVM, Microprocessor System Design, and Computer Architecture, along with skills in digital design, RTL coding, and cross-functional collaboration, to contribute to innovative projects.
Experience
Interim Engineering Intern
Jun 2025 — Present · Santa Clara, CA, US
Working on trace parser for ARM Coresight SoC-400 debug architecture, facilitating RTL-level debugging and system-level validation
Education
Anna University
Bachelor of Engineering - BE
2015 — 2019
Portland State University
Master of Science - MS
2024 — 2025
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