Ke-Chun Yeh
Silicon Photonics Layout Engineer @OpenLight
Cambridge, MA, US
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WORK HISTORY
Apr 2022 — Present
Silicon Photonics Layout Engineer @OpenLight
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Taped out 2 layouts of photonics integrated circuits (PICs) with design rule checking (DRC) and created bump-out packages for PIC testing vehicle• Created existing mask design replication with new layer generation for process design kit (PDK) release
EDUCATION
2015 — 2019
National Central University
Bachelor of Science - BS, Optics and Photonics
2019 — 2021
UC Santa Barbara
Master of Science - MS, Electrical and Computer Engineering
ABOUT KE-CHUN YEH
A passionate and disciplined electrical engineer with around 5 years of relevant work…
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