Ke-Chun Yeh
- Role
- Silicon Photonics Layout Engineer at OpenLight
- Location
- Cambridge, MA, US
- LinkedIn followers
- 500 followers
About Ke-Chun Yeh
A passionate and disciplined electrical engineer with around 5 years of relevant work…
Experience
Silicon Photonics Layout Engineer
Apr 2022 — Present
Taped out 2 layouts of photonics integrated circuits (PICs) with design rule checking (DRC) and created bump-out packages for PIC testing vehicle• Created existing mask design replication with new layer generation for process design kit (PDK) release
Education
National Central University
Bachelor of Science - BS, Optics and Photonics
2015 — 2019
UC Santa Barbara
Master of Science - MS, Electrical and Computer Engineering
2019 — 2021
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