Kazuya Shimizu

Director of Design Verification @Solidigm

Santa Clara, CA, US
EMAILS
k••••••••@solidigm.com
MOBILE NUMBERS
+19•••••••90

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WORK HISTORY

Jul 2022 — Present

Director of Design Verification @Solidigm

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San Jose, CA, US

Verification lead of NVMe SSD controllers- Working with SystemVerilog, UVM and C- Responsible for testbench architecture design, test planning, test case creation, and debugging- Understanding PCIe, NVMe, ARM processor, NAND flash memory, and DDR.

EDUCATION

2000 — 2003

The University of Osaka

Doctor of Philosophy (Ph.D.), Engineering

1998 — 2000

The University of Osaka

Master's degree, Engineering

1994 — 1998

The University of Osaka

Bachelor's degree, Engineering

SKILLS

Device DriversSystemverilogSataSocDebuggingVerilogVlsiHigh Speed InterfacesUvmPcieEmbedded SoftwareAsicFunctional VerificationSsdRtl Design

ABOUT KAZUYA SHIMIZU

Verification lead for ARM-based SoC- Fluent in SystemVerilog, UVM, Verilog, and C- Understanding of technologies for SSD including PCIe, SATA, DDR, and NAND flash memory- Design experience of SATA and SD card I/F controllers- Completed Ph.D. in LSI automatic test pattern generation (ATPG) and design for testability (DFT).

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