Kathleen Muhonen

Principal Development Engineer @Qorvo, Inc.

My current projects include improving on-wafer de-embedding techniques for measurement of SOI switch branches. I am also responsible for improving the harmonics bench capability which includes lowering the system noise floor and modifying the bench to incorporate new frequency bands. I have also worked extensively on HBT ruggedness improvement for GSM applications, linearity simulation improvement through RF characterization and model validation. Responsible for assisting in model verification. Advanced RF characterization and measurements including load pull, harmonic measurments and developing X-parameter based measurements and simulations. 2013 to present.Previously (2011, 2012) design of and SiGe on-chip ESD protection. Research in ESD testing methodologies for TLP, VF-TLP and HMM (Human Metal Model). ESDA Board of Directors, ESDA HMM Chair, ESDA Curricular Implementation Chair.