Mukesh Katha
IP Logic Design Engineer at Intel | Semiconductor Professional | VLSI Enthusiast | RTL Design Engineer | FPGA Prototyping Expert | ASIC Design Engineer
- Role
- Soc Design Engineer at Intel
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Mukesh Katha
VLSI design engineer contributing to the dynamic world of semiconductors. Currently…
Experience
Soc Design Engineer
Aug 2022 — Present · Hyderabad, IN
Managed PCIe switch fabric subsystems within System-on-Chip (SoC). • Leading the implementation of microarchitectural designs and integration of IPs in the subsystem. • Acted as a key point of contact for debugging and resolving design bugs reported by cross-functional teams. • Conducted thorough analysis of quality check issues, including Lint violations, and provided necessary fixes.• Proficient in utilizing custom tool flows (TFM) such as Integration, packageIP-CoreKit generation, SgLint, SgCDC, UPF-VCLP, and FusionCompiler-Synthesis flows. • Good understanding in generation of registers and XML files for subsystems. • Recognized and rewarded for taking ownership beyond assigned responsibilities andsuccessfully rectifying design flaws.
Education
Government Institute of Electronics, Secunderabad.
Diploma
2014 — 2017
Vasavi College of Engg
Bachelor of Engineering - BE
2018 — 2021
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